| S. N. |
Full Title of Publication |
Author/s |
Year |
Journal/Conference name |
Page Nos. |
| 1. |
Evaluation of Various Routing Architectures of Multi-FPGA Boards |
Sushil Chandra Jain, Sashi Kumar, Anshul Kumar |
January, 2000 |
13th International Conference on VLSI Design-2000, Kolkata, India |
262-267 |
| 2. |
Efficient Embedding of Partitioned Circuits onto Multi-FPGA Boards |
Sushil Chandra Jain, Anshul Kumar, Sashi Kumar |
August, 2000 |
10th International Conference on Field-Programmable Logic and Applications (FPL-2000) in Villach, Austria |
201-210 |
| 3. |
Hybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop Routing |
Sushil Chandra Jain, Anshul Kumar, Sashi Kumar |
July, 2002 |
10th International Workshop Rapid System Prototyping RSP-2002, Darmastadt, Germany |
66-73 |
| 4. |
Multi-hop routing of multi-terminal nets for evaluation of hybrid multi-FPGA boards |
S. C. Jain, A. Kumar, S. Kumar |
December, 2002 |
1st International Conference on Field-Programmable Technologies FPT-2002, Hong Kong |
298-301 |
| 5. |
Towards Implementation of Fault Tolerant Reversible Circuits |
Anugrah Jain and Sushil Chandra Jain |
September 2013 |
1st IEEE Sponsored International Conference on Emerging Trends and Applications in Computer Science (ICETACS-2013), Shilong, Meghalaya, India |
86-91 |
| 6. |
A Novel Realization of SequentialReversible Building Blocks |
Vishal Pareek, Shubham Gupta and Sushil Chandra Jain |
May 2014 |
FUTURE COMPUTING 2014, The Sixth InternationalConference on Future Computational Technologies and Applications, Venice, Italy |
1-6 |
| 7. |
Analysis and Classification of SQL Injection Vulnerabilities and Attacks on Web Applications |
Chandershekhar Sharma, S.C. Jain |
August 2014 |
IEEE Int. Conf. on Advances in Engineering & Technology research(ICAETR-2014),Dr. virendra Swarup group of institutions, Unnao, India, |
1-6 |
| 8. |
Realization of Sequential Reversible Circuit from Finite State Machine |
Shubham Gupta, Vishal Pareek and Sushil Chandra Jain |
August 2014 |
18th International Computer Science and Engineering Conference (ICSEC), IEEE, Thailand, 2014 |
458-463 |
| 9. |
Fault Tolerant and Testable Designs of Reversible Sequential Building Blocks |
Vishal Pareek, Shubham Gupta and Sushil Chandra Jain |
August 2014 |
18th International Computer Science and Engineering Conference (ICSEC), IEEE, Thailand, 2014 |
452-457 |
| 10. |
Secure and Energy Efficient Routing Algorithm in Wireless Sensor Networks |
Vinod Kumar Menaria, Deepak Soni, A. Nagaraju and S.C. Jain |
November 2014 |
IEEE(IC3I-2014) Mysore |
118-123 |
| 11. |
Synthesis of Balanced Quaternary Reversible Logic Circuit |
Jitesh Kumar Meena, Sushil Chandra Jain, Hitesh Gupta and Shubham Gupta |
March 2015 |
IEEE International Conference on Circuit, Power and Computing Technologies (ICCPCT), Kanyakumari, Tamilnadu, 2015 |
Accepted |
| 12. |
A New Gate for Low Cost Design of All-optical Reversible Logic Circuit |
Mukut Bihari Malav, Shubham Gupta and Sushil Chandra Jain |
March 2015 |
IEEE International Conference on Circuit, Power and Computing Technologies (ICCPCT), Kanyakumari, Tamilnadu, 2015 |
Accepted |
| 13. |
Load Balancing in Fault-Tolerant Real-Time Systems for Periodic Task Scheduling |
Divya Jain and Sushil Chandra Jain |
March 2015 |
IEEE International Conference on Circuit, Power and Computing Technologies (ICCPCT), Kanyakumari, Tamilnadu, 2015 |
Accepted |
| 14. |
Load Balancing Real-Time Periodic Task Scheduling Algorithm For Multiprocessor Environment |
Divya Jain and Sushil Chandra Jain |
March 2015 |
IEEE International Conference on Circuit, Power and Computing Technologies (ICCPCT), Kanyakumari, Tamilnadu, 2015 |
Accepted |
| 15. |
A Novel Gate For Realizing QCA based Logic Design |
Nitesh Gupta, Chotu Lal, Jitesh Kumar Meena and S.C Jain |
September 2015 |
IEEE International Conference on Computer Communication and Control (IC4-15), Medicaps Group of Institutions, Indore 2015 |
Accepted |
